High Performance Computer Architecture

Lesson 1: Introduction and Trends

- Computer Architecture & Tech Trends - Moore's Law - Processor Speed, Cost, Power - Power Consumption - Fabrication Yield

Lesson 2: Performance Metrics and Evaluation

- Measuring Performance - Benchmarks Standards - Iron Law of Performance - Amdahl's Law - Lhadma's Law

Lesson 3: Pipelining Review

- Pipeline CPI - Processor Pipeline Stalls - Data Dependencies - Pipelining Outro

Lesson 4: Branches

- Branch Prediction - Direction Predictor - Hierarchical Predictors - PShare

Lesson 5: Predication

- If Conversion - Conditional Move - MOVc Summary

Lesson 6: Instruction Level Parallelism (ILP)

- ILP Intro - RAW Dependencies - WAW Dependencies - Duplicating Register Values - Instruction Level Parallelism (ILP)

Lesson 7: Instruction Scheduling

- Improving IPC - Tomasulo's Algorithm - Load and Store Instructions

Lesson 8: ReOrder Buffer

- Exceptions in Out Of Order Execution - Branch Misprediction - Hardware Organization with ROB

Lesson 9: Memory Ordering

- Memory Access Ordering - When Does Memory Write Happen - Out of Order Load Store Execution - Store to Load Forwarding - LSQ, ROB, and RS

Lesson 9: Memory

- How Memory Works - One Memory Bit SRAM - One Memory Bit DRAM - Fast Page Mode - Connecting DRAM To The Processor

Lesson 10: Multi-Processing

- Flynn's Taxonomy of Parallel Machines - Multiprocessor Needs Parallel Programs! - Centralized Shared Memory - Distributed Shared Memory - Message Passing Vs Shared Memory - Shared Memory Hardware - SMT Hardware Changes - SMT and Cache Performance

• Milos Prvulovic - Dr Prvulovic's research focuses on architectural (hardware) support for program monitoring, debugging, and security, particularly in multi-threaded and multi-core systems. In general, the goal of his research is to make both hardware and software more reliable and secure. He is the area coordinator for the Computer Architecture area in the School of Computer Science at Georgia Tech. Dr. Prvulovic received his Ph.D. from the University of Illinois at Urbana-Champaign in 2003. He is a Senior Member of ACM and IEEE and is currently serving as the Secretary-Treasurer of ACM SIGMICRO.